Efficiency of a HPC from QMC's perspective
Goal: reduce the time to reach the target error bar for a given system using readily available resources time-to-solution = wall-clock time for a QMC user&developer
“Goodness” of a HPC system - More resources for a job: leadership facilities with large-job focus, e.g., OLCF, ALCF
- Powerful SMP with high peak FLOPs and preferably with large shared memory: GPUs, P7, new generation of x86
- Smart compilers and high-performance middleware, e.g., MPI, vectorized math libraries
- Infrastructure: short time to build and validate codes
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